Digital System Design for BE Anna University R25 CBCS (III - ECE - EC25C07)

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Syllabus Digital System Design - (EC25C07) Boolean Algebra : Revisiting Boolean algebra and minimization, 4-variable Karnaugh Maps, SOP and POS Minimization using Karnaugh Maps-Introduction to Verilog HDL, Data Types and Operators-Different types of Modeling. (Chapters - 1, 2) Combinational Digital Circuits : Introduction to combinational circuits, realization of logic expressions using AOI, NOR, and NAND gates. Adders, Subtractors, Multiplexers, De-multiplexers, Encoders, Decoders, Priority encoders, Arithmetic circuits, such as multipliers, Ripple adders, Code-converters - Programming using Verilog HDL. (Chapter - 3) Sequential Digital Circuits : Introduction to sequential circuits, Moore and Mealy machine, Flip-flops and Latches, realization of flip-flops using S-R flip-flop, master slave flip-flop, JK flip-flop, T and D flip-flops, Realization of flip-flops using logic gates, introduction to shift registers, realization of different types of shift registers, introduction to counters, realization of different types of counters, Introduction to different types of memories Programming using Verilog HDL. (Chapters - 4, 5, 6, 7) Finite State Machines : Need for FSM, Elements of FSM, Components in FSM, FSM in HDL, Issues in FSM design, Case studies: Sequence detector, Odd parity Checker, Vending Machine. (Chapter - 8) FPGA Architecture : Introduction to FPGA Architecture, Components of FPGA Architectures - Programming Technologies, Logic elements and Look-up Tables, Dedicated multipliers, Distributed RAM, Shift registers, Digital Clock Managers, Altera FPGA and AMD Xilinx FPGA architectures and design flow-AMD Spartan, Virtex, Altera Cyclone, Arria and Agilex architectures-Introduction to IP Cores - AMD Microblaze V and Altera NIOS V Soft core processors. (Chapter - 9)

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Pages: 432 Edition: 2026 Vendors: Technical Publications