UNIT I Number Systems and Digital Logic Families Number system, error detection, corrections & codes conversions, Boolean algebra : De-Morgan’s theorem, switching functions and minimisation using K-maps & Quine McCluskey method - Digital Logic Families - comparison of RTL, DTL, TTL, ECL and MOS families - operation, characteristics of digital logic family. (Chapters - 1, 2, 3) UNIT II Combinational Circuits Combinational logic - representation of logic functions - SOP and POS forms, K-map representations - minimization using K maps - simplification and implementation of combinational logic - multiplexers and de multiplexers - code converters, adders, subtractors, Encoders and Decoders. (Chapter - 3) UNIT III Synchronous Sequential Circuits Sequential logic - SR, JK, D and T flip flops - level triggering and edge triggering - counters - asynchronous and synchronous type - Modulo counters - Shift registers - design of synchronous sequential circuits - Moore and Melay models - Counters, state diagram; state reduction; state assignment. (Chapters - 4, 5, 6) UNIT IV Asynchronous Sequential Circuits and Programmability Logic Devices Asynchronous sequential logic circuits - Transition stability, flow stability-race conditions, hazards & errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmability Logic Devices : PROM - PLA - PAL, CPLD-FPGA. (Chapters - 7, 8, 9) UNIT V VHDL RTL Design - combinational logic - Sequential circuit - Operators - Introduction to Packages - Subprograms - Test bench. (Simulation / Tutorial Examples : adders, counters, flip flops, Multiplexers & De multiplexers). (Chapter - 10)
