VLSI Design for GTU 18 Course (V - ECE - 3151105)

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1. Introduction : Overview of VLSI design methodology, VLSI design flow, Design hierarchy, Concept of regularity, Modularity and Locality, VLSI design style, Design quality, package technology, introduction to FPGA and CPLD, computer aided design technology. (Chapter - 1) 2. Fabrication of MOSFET : Introduction, Fabrication Process flow : Basic steps, C-MOS n-Well Process, Layout Design rules, full custom mask layout design. (Chapter - 2) 3. MOS Transistor : The Metal Oxide Semiconductor (MOS) structure, The MOS System under external bias, Structure and Operation of MOS transistor, MOSFET Current-Voltage characteristics, MOSFET scaling and small-geometry effects, MOSFET capacitances. (Chapter - 3) 4. MOS Inverters - Static Characteristics : Introduction, resistive load inverter, inverter with n-type MOSFET load (Enhancement and Depletion type MOSFET load), CMOS Inverter. (Chapter - 4) 5. MOS Inverters Switching characteristics and Interconnect Effects : Introduction, Delay-time definitions, calculation of delay times, Inverter design with delay constraints, estimation of interconnect parasitic, calculation of interconnect delay, switching power dissipation of CMOS Inverters. (Chapter - 5) 6. Combinational MOS Logic Circuits : Introduction, MOS logic circuits with depletion nMOS loads, CMOS logic circuits, complex logic circuits, CMOS Transmission Gates (TGs). (Chapter - 6) 7. Sequential MOS Logic Circuits : Introduction, behavior of bistable elements, the SR latch circuit, clocked latch and flip-flop circuit, CMOS D-latch and Edge-triggered flip-flop. (Chapter - 7) 8. Dynamic Logic Circuits : Introduction, Basic Principles of pass transistor circuits, voltage bootstrapping, synchronous dynamic circuit techniques, CMOS dynamic circuit techniques, high-performance dynamic CMOS circuits. (Chapter - 8) 9. Chip I/P and O/P Circuits : On chip Clock Generation and Distribution, Latch-Up and its Prevention. (Chapter - 9) 10. Design for testability : Introduction, Fault types and models, Controllability and observability, AdHoc Testable design techniques, Scan-based techniques, built-in SelfTest (BIST) techniques, current monitoring IDDQ test. (Chapter - 10) 11. FinFET Device : Introduction (Need of FinFET device), structure, Comparison between FinFET and Planar MOSFET (gm, gds, leakage current, DIBL, Subthreshold Slope). (Chapter - 11)

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Pages: 272 Edition: 2023 Vendors: Technical Publications