Digital Techniques for MSBTE I Scheme (III - CO/CM/CW - 22320)

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Unit - I Number System and Codes(08 Marks) 1.1 Number System : base or radix of number system, binary, octal, decimal and hexadecimal number system. 1.2 Binary Arithmetic : Addition, subtraction, multiplication, division. 1.3 Subtraction using 1's complement and 2's complement. 1.4 Codes : BCD, Gray Code, Excess-3 and ASCII code. 1.5 BCD Arithmetic : BCD Addition Unit - II Logic Gates and Logic Families (12 Marks) 2.1 Logic gates : Symbol, diode/transistor switch circuit and logic expression, truth table of basic logic gates (AND, OR, NOT), Universal gates (NAND and NOR) and Special purpose gates (EX-OR, EX-NOR), Tristate logic 2.2 Boolean algebra : Laws of Boolean algebra, Duality Theorem, De-Morgan's theorems 2.3 Logic families : Characteristics of logic families : Noise margin, Power dissipation, Figure of merit, Fan-in and fan-out, Speed of operation, Comparison of TTL, CMOS, types of TTL NAND gate Unit - III Combinational Logic Circuits(18 Marks) 3.1 Standard Boolean representation : Sum of Product (SOP) and Product of Sum (POS), Min-term and Max-term, conversion between SOP and POS forms, realization using NAND/NOR gates. 3.2 K-map reduction technique for the Boolean expression : Minimization of Boolean funcitons up to 4 variables (SOP and POS form) 3.3 Design of arithmetic circuits and code converter using K-map : Half and full adder, half and full subtractor, gray to binary and binary to gray (up to 4 bits) 3.4 Arithmetic circuits : (IC 7483) Adder and Subtractor, BCD adder 3.5 Encoder/Decoder : Basics of encoder, decoder, comparison, (IC 7447) BCD to 7 segment decoder/driver 3.6 Multiplexer and Demultiplexer : Working, truth table and applications of Multiplexers and Demultiplexers, MUX tree, IC 74151 as MUX; DEMUX tree, DEMUX as decoder, IC 74155 as DEMUX. 3.7 Buffer : Tristate logic, unidirectional and bidirectional buffer (IC74LS244, 74LS245) Unit - IV Sequential Logic Circuit(18 Marks) 4.1 Basic memory cell : RS-latch using NAND and NOR 4.2 Triggering Methods : Edge trigger and level trigger 4.3 SR Flip Flops : SR-flip flop, clocked SR flip flop with preset and clear, drawbacks of SR flip flop 4.4 JK Flip Flops : Clocked JK Flip flop with preset and clear, race around condition in JK flip flop, Master slave JK flip flop, D and T type flip flop Excitation table of flip flops, Block schematic and function table of IC-7474, 7475 4.5 Shift Register : Logic diagram of 4-bit shift registers-Serial Input Serial Output, Serial Input Parallel Output, Parallel Input Serial Output, Parallel Input Parallel Output, 4 bit Universal Shift register. 4.6 Counters : Asynchronous counter : 4 bit Ripple counter, 4 bit up/down counter, modulus of counter Synchronous counter : Design of 4 bit synchronous up/down counter Decade counter : Block schematic of IC 7490 Decade counter, IC 7490 as MOD-N Counter, Ring counter, Twisted ring counter. Unit - V Data Converters and PLDs(14 Marks) 5.1 Data Converter : DAC : Types, weighted resistor circuit and R-2R ladder circuit, DAC IC 0808 specifications ADC : Block Diagram, types and working of Dual slope ADC, SAR ADC, ADC IC 0808/0809, specification 5.2 Memory : RAM and ROM basic building blocks, read and write operation, types of semiconductor memories 5.3 PLD : Basic building blocks and types of PLDs, PLA, PAL, GAL 5.4 CPLD : Basic Building blocks, functionality

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Author: [A.P.Godse,Dr. D.A.Godse, S.S.Mahulkar, Ajaykumar K. Kakde ,S.S. Yenkar] Pages: 16 Edition: 2020 Vendors: Technical Publications