Processor Architecture for SPPU 19 Course (SE - IV - IT - 214451) (Decode) (END SEM)

Rs. 150.00
Tax included. Shipping calculated at checkout.

Syllabus Processor Architecture - (214451) Credit Scheme : Examination Scheme : 03 End_Semester : 70 Marks Unit III PIC Interrupts & Interfacing - I PIC Interrupts : Interrupt Vs Polling, IVT, Steps in executing interrupt, Sources of interrupts; Enabling and disabling interrupts, Interrupt registers, Priority of interrupts, Programming of : Timer using interrupts, External hardware interrupts, Serial communication interrupt; Interfacing of LED, Interfacing 16X2 LCD (8 bits) and Key board (4 x 4 Matrix), Interfacing Relay & Buzzer. (Chapters - 6, 7) Unit IV PIC Interfacing - II CCP modes : Capture, Compare and PWM generation; DC Motor speed control with CCP, Stepper motor interfacing with PIC, Basics of Serial communication protocols : Study of RS232, I2C, SPI, UART, Serial communication programming using Embedded C. (Chapters - 5, 8) Unit V PIC Interfacing - III Interfacing : Interfacing of ADC and DAC 0808 with PIC, Temperature sensor interfacing using ADC and I2C with PIC, Interfacing of RTC (DS1306) using I2C with PIC, Interfacing of EEPROM using SPI with PIC. (Chapter - 9) Unit VI Current Trends in Processor Architecture ARM & RISC : ARM and RISC design philosophy, Introduction to ARM processor & its versions ARM 7, ARM 9, ARM 11, Features & advantages of ARM processor, Suitability of ARM processor in embedded applications, ARM 7 dataflow model, Programmers model. CPSR & SPSR registers, Modes of operation, Difference between PIC and ARM. (Chapter - 10)

Pickup available at Nashik Warehouse

Usually ready in 24 hours

Check availability at other stores
Pages: 192 Edition: 2023 Vendors: Technical Publications